PAPER / ARXIV:2609.07907
Tong Wu , Atharva Raut , Ian Khor , Ziyad Alswaidan , Ting-Yu Lee , Hongchang Kuang , Navid Anjum Aadit , Anand Raju , Dhruv Chinmay , Siddharth Das , Ken Mai , Kerem Camsari , Tathagata Srimani
RESUMO
We report a 28 nm four-chip Ising accelerator with 27,648 spins, degree-15 Pegasus connectivity, and 10b coefficients. Boundary-state streaming overlaps interchip transfers with spin updates, achieving 98.03% simulated weak-scaling efficiency. At 140 MHz, the four-chip system delivers 30.24G peak updates/s at 1.2 pJ/update including I/O power, with 11.5$\times$ the throughput and approximately one-quarter the logic-plus-SRAM area per spin of a prior 28 nm multichip design. We demonstrate MaxCut, spin glass, frustrated loops, factorization, and 3SAT.
NO MESMO MAPA